Lead-free solder bump structures may be formed either by electroplating or by a physical transfer methodology, such as C4 (controlled collapse chip connection) and C4NP (controlled collapse chip connection new process). For lead-free (Pb-free) solder, the BLM (barrier layer metallurgy or ball limiting metallurgy) may comprise layers of titanium-tungsten, (TiW), copper (Cu), and nickel (Ni). The BLM may alternatively comprise layers of TiW, Cu, Ni, and Cu. During patterning of the bottom Cu seed layer and the TiW base layer, a chemical undercut of 1-2 μm per edge results. In addition, once the lead-free solder bump is placed or electroplated, there is a thermally driven reaction that occurs between tin (Sn) in the bump and any exposed Cu seed layer edge. The reaction consumes Cu in the formation of an intermetallic compound and results in additional undercut of the Cu beneath the solder bump. This is referred to as thermal undercut, and can add an additional 2-5 μm per edge of bump undercut. The sum of the two undercut mechanisms in C4NP or plated C4 processing is typically on the order of 4-5 μm per edge, with a wide range (e.g., 4-5 additional microns) extending the worst-case maximum possible bump undercut into the 5-10 μm range per edge.
Bump undercuts pose a chip reliability concern for white bumps (e.g., C4 solder bumps that do not make good electrical contact to the last metal pad), particularly on the tensile side of the bump in the case of FCPBGA (flip chip ball grid array) organic laminate packaging. On the tensile side of the bump, the BLM undercut can act as an incipient crack when bump torque is applied during thermal coefficient of expansion (TCE)-mismatch cooling at the chip join operation. This crack can allow the bump to rotate and crack the underlying back end of line (BEOL) dielectric and wiring materials.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.